FPGA Design Engineer

FPGA Design Engineer Miejsce pracy: Łódź Technologies we use Expected Verilog SystemVerilog SoC ARM CSS DDR4/DDR5 PCIe Gen5 Gen4 IP Optional Design Compiler SpyGlass CDC/DFT Fusion Compiler Python TCL Linux firmware Operating system Linux About the project We’re building a next-generation high-performance SoC platform targeting cloud and AI workloads. Join us as a Digital Design Engineer to design cutting-edge digital blocks, including multi-core ARM Cortex subsystems (ARM CSS), DDR5 memory con…