FPGA Verification Engineer

Expected, SystemVerilog, UVM, SoC, ARM CSS, DDR4/DDR5, PCIe Gen5, Gen4 IPOptional, Synopsys VCS, SpyGlass, Verdi, JasperGold, Python, TCL, Perl, Ethernet, DPDKAbout the project, Join our expanding verification team working on next-gen multicore SoCs with high-speed DDR5, PCIe Gen5, and ARM Cortex subsystems. Apply advanced verification methodologies, including UVM, formal verification, and CDC analysis, to validate cutting-edge SoC IPs., , By joining us, you become a member of the Embedded Comp…